Disc drive storage systems are commonly used for storing data in electronic products ranging from digital cameras to computer systems. A disk drive comprises a head assembly and an electronics assembly conventionally attached to the head assembly for controlling head operation and providing a communication link between the head assembly and a host device served by the disk drive. The disk drive further comprises a disk having a data-recording surface for storing information therein. The disk is rotated at a constant speed while a closed loop servo system controls head position. The head assembly further comprises a read head for reading data from the recording surface and a write head for writing data to the recording surface.
An exemplary disk drive storage system 10 (see FIG. 1) comprises a disk 12 comprising magnetic material within a recording surface region for storing information in the form of binary bits for later retrieval and processing by the host device. Information bits are written to the recording surface of the disk 12 by magnetizing magnetic material domains to represent a binary zero or a binary one. The domains retain the magnetization for later retrieval during a read operation.
A spindle motor 13 rotates the disk 12 (typically at speeds up to 10,000 revolutions per minute) as a read/write head 14 disposed over an upper surface of the disk 12 writes data to or reads data from the disk 12. The read/write head 14 is affixed to a suspension arm 16 controlled by a voice coil motor 18 for moving the suspension arm 16 across the upper surface of the disk 12 along an arc extending between a disk circumference 24 and a hub 26. The physical features of the read/write head 14 and the suspension arm 16 allow the read/write head 14 to ‘fly’ over the disk upper surface at a distance referred to as a fly height. Contact between the head and the disk is to be avoided. The fly height is established to optimize performance of the read/write head 14 during read and write operations. An abrupt reduction in the operating fly height, for example, when the read/write head 14 encounters an asperity in the disk 12, may reduce the probability of returning correct read data to the host device.
The disk 12 comprises a plurality of concentric tracks 30 (typically 20,000 or more per radial inch) for storing binary data in fields 32 and head location information in servo bursts 34, where the latter provide feedback to the voice coil motor 18 for controlling head position along the tracks 30 (referred to as track following) and for moving the read/write head 14 rapidly and accurately between the tracks 30 (referred to as track accessing).
To write data to the disk 12, the voice coil motor 18 moves the suspension arm 16 to a desired radial position above the disk 12 while the disk 12 is rotating to position the region to be written under the read/write head 14. An electronics module 40 produces write current representing the data bits, as supplied by the host system, to be written to the disk 12. The write current is supplied to a coil (magnetically coupled to a magnetically permeable core) of an inductive writer in the read/write head 14 for producing a magnetic field. The magnetic field extends from the core across an air gap between the read/write head 14 and the disk's upper surface to magnetize a region of magnetic domains in the recording surface, thereby storing a data bit in the region.
The read/write head 14 comprises a read head including, in one embodiment, a magnetoresistive sensor that undergoes a change in electrical resistance in the presence of magnetic fields of selected orientation produced by the magnetic domains in the recording surface. During a read operation, a DC (direct current) bias voltage, e.g., of between about 0.025 V and 0.3 V, is supplied to the magnetoresistive sensor from the electronics module 40 to bias the read head.
During a data read or a servo read operation the suspension arm 16 moves while the disk 12 rotates to position the read/write head 14 (and thus the magnetoresistive sensor) above the magnetized region to be read. The magnetized disk region alters a resistance of the magnetoresistive sensor, generating an output signal comprising a relatively small AC (alternating current) voltage imposed on the DC bias voltage. The AC voltage, which is supplied to the electronics module 40, represents the magnetization of the read region of the disk 12, i.e., either a data one or a data zero. A preamplifier within the electronics module 40 receives and amplifies the AC voltage for further processing and decoding in a read channel of the module 40.
Continual advancements have led to higher storage capacity disks, higher data transfer rates during read and write operations and smaller magnitude read head signals representing the stored data bits. The use of magnetoresistive (MR) heads, giant magnetoresistive (GMR) heads and tunneling magnetoresistive (TMR) heads permits reduction of the fly height and correspondingly higher data storage densities. However, the reduced fly height introduces an increased likelihood of read signal distortion due to thermal interaction between the head and the disk. More particularly, changes in head temperature as the head flies over the disk surface, referred to as thermal asperities, introduce distortion in the read signals. Such thermal asperities are typically caused by physical contact between the head and contaminating oil or a contaminating particle on the disk 12. Thermal asperities can also be induced by flying height changes as the read/write head 14 passes over “hills” and “valleys” present on an irregular disk surface.
The effects of an asperity event on the magnetoresistive read head and on an output signal of a read channel responsive to the head signal are well known. When the head strikes a particle or magnetic media defect, referred to as a thermal asperity event, the head temperature can increase by more than 120° C. Due to the resistance temperature coefficient of the magnetoresistive sensor (about 0.02% per degree C.), the thermal asperity can cause a significant voltage transient or a DC baseline shift in the read signal amplitude, followed by a decaying signal amplitude having a duration of about two to five microseconds while the heat is released to the local environment as the head cools.
FIG. 2 illustrates a quiescent DC bias voltage baseline 42 and a read signal 43 for decoding within the read channel to detect the read bit. A thermal asperity event occurs at a time t1 and the resulting thermal effects on the read/write head 14 cause a baseline shift to a transient baseline 42A, increasing a DC level of the read signal 43. The baseline voltage shift resulting from the thermal asperity event may be in the range of about 5 mV to about 25 mV.
The thermal asperity event usually does not damage the head 14, but during the event the read signal is distorted as illustrated in FIG. 2, jeopardizing successful recovery of the data bits. Although the read channel includes error detection and correction features, a data re-read operation must be performed if the bit error rate during the event exceeds those error correction capabilities. As the magnetoresistive head cools, the baseline offset 42A decays back to the nominal baseline 42 as illustrated in FIG. 2.
In addition to data bit detection difficulties, the increasing read signal amplitude at the inception of the thermal asperity event can be coupled to the adjacent write head. The resulting write head current may saturate the magnetic recording medium in the area of the write head, erasing any recorded data in that region.
A thermal asperity event length can span the reading of a significant number of bytes from the disk-recording surface. For example, in a disk drive having a data transfer rate of 200 megabits per second (Mbits/sec), uncompensated thermal asperities have a duration from about two to five microseconds, distorting about 50 to 125 bytes of read data. As contaminates and disk surface corrosion build-up with use of the disk drive, the event duration lengthens. These effects further reduce the capabilities of a disk drive to reliably store and retrieve user data over its operational life.
Localized media anomalies can also cause problems in the storage and recovery of data from the disk 12, preventing the head 14 from recovering stored data. Typically these media anomalies generate a read signal disturbance signature similar to a thermal asperity event.
Various data and synchronization block formats have been utilized in an effort to compensate for thermal asperity effects, localized media anomalies and other anomalous disk conditions. For example, one format utilizes redundant first and second synchronization fields in each data block so that the stored data can be recovered if an anomalous condition prevents the read channel from correctly decoding one of the two synchronization fields. Further, the two synchronization fields in the data block are separated by a sufficient distance such that a thermal asperity coincident with a read operation on one of the synchronization fields does not interfere with a read operation on the other synchronization field.
According to another known technique, a thermal asperity detector determines when the read signal exceeds a predetermined threshold, ignores the read data during the asperity event and signals a disk drive controller to reread the sector after the asperity event has ended. The occurrence of second asperity event during the reread operation is not likely because the collision between the head and the particle usually moves the particle off the disk sector. Permanent, immobile defects in the disk storage media are rare.
A thermal asperity detector for use with a conventional disk drive 10 comprises a signal peak detector for determining when a read signal has exceeded a predetermined threshold, including thresholds indicating the possible occurrence of a thermal asperity event or another media anomaly. Various known peak detectors can detect either a positive polarity peak, a negative polarity peak, or both positive and negative polarity peaks. Also, the peak detector can detect cooling thermal asperities that are of the opposite polarity to the positive going heating thermal asperities described above.
Peak detectors for determining the occurrence of a thermal asperity event may not be able to accurately detect signal peaks in lower magnitude read signals produced by advanced-technology heads. False peak detections are also to be avoided.
FIG. 3 illustrates, in block diagram form, a prior art differential-input peak detector 50 capable of detecting both positive and negative polarity peaks in excess of a threshold value. A differential input signal is supplied from the read head 14 on conductors 51 and 52 to a high pass filter 54 for removing DC offset or DC bias levels in the input signal. An inverting amplifier 56 amplifies and inverts the differential signals input thereto from the filter 54 to produce a differential output signal supplied as inputs to comparators 58 and 60. Specifically, a first signal on an output conductor 61 is supplied to an inverting input terminal of the comparator 58. A second signal on an output conductor 62 is supplied to a non-inverting input terminal of the comparator 60.
A reference threshold voltage VTH is supplied to a non-inverting input terminal of the comparator 58 and to an inverting input terminal of the comparator 60. To limit variations in the reference voltage VTH with temperature, in one embodiment VTH is produced by a zero temperature coefficient current (i.e., the current does not vary with a temperature) flowing through a resistor (neither shown in FIG. 3).
The comparators 58 and 60 produce an output signal at respective output terminals 70 and 72 in response to a relationship between the signal present at the inverting terminal (for the comparator 60) or the non-inverting input terminal (for the comparator 58) and the reference voltage. The comparator 58 produces a high logic state output signal at the output terminal 70 when the threshold voltage is greater than the signal at the inverting input terminal. The comparator 60 produces a high logic state output signal on the output terminal 72 when the signal at the non-inverting input terminal is greater than the threshold voltage. Recognizing that the amplifier 56 is an inverting amplifier, input signal excursions above VTH are indicated by a high logic state of the comparator 58 and input signal excursions less than a negative VTH are indicated by a high logic state of the comparator 60. Thus the comparators 58 and 60 indicate the occurrence of a positive or negative signal peak having a magnitude greater than the threshold voltage VTH.
A gain of the amplifier 56 is typically between about 0.5 and 2; the gain is selected based on the expected amplitude range of the differential-input signals on the conductors 51 and 52 and on operating head room of the comparators 58 and 60. When using an amplifier with a relatively low gain, the reference voltage must be reduced and the comparators 58 and 60 must have the capability to process small amplitude signals, and to detect smaller differences between the input signal and the threshold to accurately detect a thermal asperity event. The use of a higher gain amplifier may appear to resolve this difficulty, but higher gains can introduce signal nonlinearities into the amplification process. For accurate detection of a thermal asperity event by peak signal detection, the effects of gain nonlinearities in the amplified differential-output signals produced by the amplifier 56 and in the reference voltage VTH must be minimized.
FIG. 4 illustrates in schematic form additional details of one embodiment of the amplifier 56. The reference voltage VTH is generated by a current supplied from a current source 96 through a resistor R4 and supplied to the non-inverting input terminal of the comparator 58 and to the inverting input terminal of the comparator 60. In another embodiment, the signals supplied to the inverting and non-inverting input terminals of the comparator 58 (and the comparator 60) are reversed with a corresponding reversal in the interpretation of the comparator output signal.
Bipolar junction transistors (BJTS) Q1 and Q2, each operative with a respective load resistor R2 and R3, operate as a bipolar differential amplifier, producing differential-output signals Vo1 and Vo2 in response to the differential input signals supplied from the high pass filter 54. The output signal Vo1 is supplied to the inverting input terminal of the comparator 58. The output signal Vo2 is supplied to the non-inverting input terminal of the comparator 60. In a preferred embodiment, the resistors R2 and R3 have the same resistance.
Positive and negative rail voltages (the latter can be ground in one embodiment) are identified as VPOS and VNEG in FIG. 4.
The resistor R4 and the current source 96 comprise a single-ended reference voltage generator producing the reference voltage VTH. In one embodiment the current source 96 comprises a zero temperature coefficient DAC (digital-to-analog converter) current source (referred to as an IDAC) responsive to a digital value that determines the current generated by the current source. The digital value is selected during manufacture of the of the disk drive 10 and stored in the electronics module 40, allowing the disk drive manufacturer to establish the reference voltage VTH and thereby determine the input signal level at which the comparators 58 and 60 trigger to indicate a signal peak greater than the threshold, e.g., to indicate the occurrence of a thermal asperity event.
Current sources 102 and 104 provide drive current through the resistors R2, R3 and R9, with the resistor R9 operative as a degeneration resistor for improving linearity (i.e., minimizing distortion) of the differential amplifier's response. To minimize nonlinearities in the differential amplifier's output signals, the input voltage differential between the input signals supplied to Q1 and Q2 should be small, permitting the bipolar junction transistors Q1 and Q2 to operate in a narrow linear region. The degeneration resistor R9 connected between the emitters of Q1 and Q2 drops a majority of the input differential voltage, reducing the input voltage differential between Q1 and Q2, increasing linearity in the operation of Q1 and Q2 and therefore increasing linearity in the operation of differential amplifier.
The affect of the resistor R9 on the linearity of the amplifier 56 is determined by a relationship between R9 and the transconductance parameter, gm, of the transistors Q1 and Q2. The amplifier 56 exhibits relatively good gain linearity for 1/gm<<R9. Ideally, it is desired that the bipolar differential amplifier 56 exhibit perfect gain linearity so as not to introduce nonlinear effects during the amplification process, as such nonlinear effects can impair the detection of positive and negative signal peaks by the comparators 58 and 60.
A gain of the bipolar differential amplifier 56 is approximated by a ratio 2R2/R9 (or 2R3/R9 since in a preferred embodiment where R2=R3). More precisely, the gain equals 2R2/(R9+2/gm)=2R3/(R9+2/gm), which simplifies to 2R2/R9=2R3/R9 for R9>>2/gm. As is known, these gain equations are valid only for relatively low voltage or low magnitude input signals.
For high voltage input signals, the gain is not constant (i.e., not a constant function of R2 and R9) and therefore the voltages Vo1 and Vo2 input to the comparators 58 and 60 may not be as linear as desired. Thus a magnitude of the differential input signals supplied on the conductors 51 and 52 may cause a gain-induced nonlinearity in the detection process. Any such nonlinearity in the operation of the peak detector 50 may falsely indicate the occurrence of a thermal asperity event or fail to detect a thermal asperity event. All nonlinearities should be minimized.
Undesired signal nonlinearities may also occur in the generation of the reference threshold voltage VTH due to nonlinear operation of the current source 96, which may be caused by random process variations encountered while fabricating the individual components of the current source 96.
The BJTS Q1 and Q2 of the amplifier 56 illustrated in FIG. 4 may be replaced by respective MOSFETS (metal-oxide semiconductor field-effect transistors) M1 and M2 cooperatively operating as a MOSFET differential amplifier responsive to differential input signals supplied to MOSFET gate terminals from the filter 54. The MOSFET embodiments may be preferred for cost reasons when otherwise fabricating integrated circuits (such as the electronics module 40) with MOSFETS. That is, the incorporation of process steps for fabricating BJTS introduces cost and complexity into a MOSFET fabrication process.
Gain of a MOSFET differential amplifier is determined according to an equation that has the same form as the equation for the BJT differential amplifier of FIG. 4. That is, 2R2/(R9+2/gm) or 2R3/(R9+2/gm). Since a MOSFET transconductance is generally much smaller than a BJT transconductance, gain nonlinearities are greater in the MOSFET differential amplifier than in the corresponding BJT differential amplifier. Also, a pair of MOSFETS may have larger parameter offsets (random parameter mismatches due to the fabrication process variations, such as a threshold voltage mismatch) than a pair of bipolar junction transistors.
Given the relatively smaller transconductance and likelihood of larger parameter offsets, the MOSFET differential amplifier may introduce more nonlinear effects over a range of expected input signals than the BJT differential amplifier. The MOSFETS may also introduce greater nonlinearities into the amplification process than those attributable to the reference voltage VTH.
The output voltages of a differential amplifier can be mathematically expressed as an output voltage term plus an error term that accounts for parameter offsets between the two transistors comprising the differential amplifier. Thus the comparators 58 and 60 of FIG. 4 compare the threshold reference voltage VTH with Vo1±Verror1 and Vo2±Verror2, where Verror1 and Verror2 represent the transistor parameter offsets that contribute to undesired differences between Vo1 and Vo2. The error terms cause nonlinearities and asymmetries in the comparison process performed by the comparators 58 and 60, possibly generating comparator output signals that do not accurately represent the relationship between Vo1 and the threshold voltage VTH and between Vo2 and VTH.
Preferably, the peak detector 50 is a component of the preamplifier of the electronics module 40 for receiving signals representing the read data bits and for detecting a thermal asperity event in response thereto as described above.